Comcores eCPRI core is a highly scalable and silicon agnostic implementation of the eCPRI standard targeting
any ASIC, FPGA or ASSP technologies. The eCPRI implementation is building on long-time experience
designing CPRI and Radio-Over-Ethernet solutions for fronthaul and delivers a flexible engine that is
prepared for tight integration with software applications. The solution is prepared to support the legacy
solutions as well the new standards making use of L1 offload. The IP is designed to meet or exceed the requirements
of radio systems, base band systems, C-RAN switches or advanced test systems. The speed
optimized core can handle any solutions reaching from the “small footprint” to the most complex applications
running 25 Gbps. The IP can dynamically be configured to handle wireless multi-mode radio systems
enabling high-performance throughputs required by 4G and 5G wireless solutions. With the availability of
demo platforms Comcores offers a fast track approach to eCPRI bring-up.
Richly featured and highly configurable
- eCPRI specification V1.2 features implemented
- Support for time-domain IQ transport
- Support for several RU to CU functional splits
- Support for xRAN CUS-plane v. 2.0
- Supports various Ethernet speeds such as 10G and 25G
- Easy setup for synchronization
- Wide flexibility for configuring
- Designed in VHDL and targeting any RTL implementation like ASICs, ASSPs and FPGAs
Request datasheet: email@example.com
Easy to use
- Test bench with typical system configuration and examples
- SW API included in delivery
- HW demonstration platform available
The IP core comes with an extensive documentation that, among others,
includes Product Brief and User Manual.
The core will by default be delivered encrypted. Source code option is available.
Pricing and further information
Please contact sales for further information about the IP core.
Request quote for eCPRI IP Core: firstname.lastname@example.org