CPRI over Ethernet Structure Aware Mapper

General Description

Comcores Structure Aware mapper/de-mapper IP core is a silicon agnostic implementation of the structure aware mapping method described in the IEEE 1914.3 standard. The IP-core takes multiple streams of CPRI data and map these into one or several 10G Ethernet data streams and vice versa. The IP-core allows for synchronization from various sources.

To ensure easy integration build-in test capabilities is provided in the core.

Key Features



Delivering Performance
  • Complies with IEEE 1904.3 pre-standard
  • Support multiple streams of CPRI and Ethernet
  • Prepared for various modes of operation
Easy to use
  • HW demonstrator available
  • Build-in test capabilities
Silicon Agnostic
  • Designed in VHDL-93 and targeting any RTL implementation like ASICs, ASSPs and FPGAs.

Request Datasheet:  info@comcores.com

  Radio designs
  • Enables Ethernet as a connectivity option for Radio's
  • Used with designs where customer has own proprietary CPRI
Baseband designs
  • Enables Ethernet as a fronthaul option
  • Easy integration with legacy CPRI
  • Fast track testing RoE implmentations
  • Many test options available in core


The IP core comes with a solid documentation that among others include Product Brief and User Manual. The core will by default come in an encrypted format. Source code option is available.


Please contact sales for further information about pricing

Request Quote for RoE IP Core:  sales@comcores.com