Comcores JESD207 IP core is a Radio Front End to Base Band Digital Parallel interface between a Radio Front-end integrated circuit (RFIC) and a Baseband integrated circuit (BBIC).
It can be used to connect to a radio front-end (RF) transceiver device with integrated analog to digital converter (ADC) and digital to analog converter (DAC).
Easy to Use
- Designed to JEDEC JESD207 specification
- Low Latency Data Transfer
- Data path interface transfer bandwidth up to 2.2 Gbps
- Data width matched to baseband sample width
- Data path clock and data rate controlled by RFIC
- Simple test bench is included
- VIP and regression test suite available
- Designed in VHDL and targeting any RTL implementation like ASICs, ASSPs and FPGAs.
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- Enables connectivity between RFIC and BB
The IP core comes deeply verified, IOT'ed and with a extensive documentation that among others include Product Brief, User Manual, Regression Test Environment, Test Cases and test reports.
The core will by default come in an encrypted format. Source code option is available.
Please contact sales for further information about pricing
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