JESD standards are open standards developed by the JEDEC organization. Comcores is a market leader in JESD204B and JESD204C which are seriel synchroneous data converter interface standards. JESD204B and JESD204C standardize and reduce the number of data inputs/outputs on high-speed data converters and provide a synchroneous interface. This standard defines speeds of up to 12.5 Gbps but can possibly be run at higher speeds. More and more converter devices are requesting higher speeds and an increased number of lanes. For this purpose a JESD204C standard is in the process of being established. Comcores offer a pre-standard solution for this which among others include a 64B66b encoder/decoder.

Key Features



Richly Featured and highly configurable
  • Check individual product sheet for features
Easy to use
  • Designed in VHDL-87 and targeting any RTL implementation like ASICs, ASSPs and FPGAs.
  • Test bench with typical system configuration and examples
  • Very easy integration
  • Light SW setup

Request Furhter Information:

  Serial Data Converter Interfaces
  • JESD204B enables high-speed serial synchroneous interfaces


The IP cores come deeply verified, IOT'ed and with an extensive documentation that among others include Product Brief, User Manual, Verification Guide, Regression Test Environment, Test Cases and test reports. The cores will by default come in an encrypted format. Source code option is available.

Pricing and Availability

Please contact sales for further information about pricing.